BGA repair: to ensure process control and cost savings
Current international research enhances the trend of integrated circuits to area array packages. BGA (ball grid array), CSP (chip-scale package) and flip chip (flip chip) not only in the printed circuit board unit area to provide much larger input / output (I / O), but also provide significant Electrical, mechanical and unit cost advantages. Increased assembly density, reduced feature size and package reduces the distance between electrical signals, resulting in improved speed and performance. So the number of flip chips and other advanced packages is expected to increase dramatically in 2002, reaching nearly $ 2 billion in 2003.
The progress of the assembly equipment has been prepared for an acceptable ppm loss rate in the production process. However, for many companies, high-quality repair is still a costly nightmare. A more thorough understanding of the area arrangement package and its production parameters can reduce the fear of BGA repairs, ensure process control, and save significant rework costs.
Based on the historical experience of most operators, three repair problems are still extremely important:
In the process, the components are removed from the board without damaging the substrate, pads and adjacent elements
Reattach the components in a process-controlled manner
Check the quality of the process
Those that promote fine pitch, external pin components such as QFP (quad flat pack) develop density and performance requirements, from handling, manual welding and inspection point of view, resulting in adequate repair of headache. Although the area of the package does not appear the same processing problems, but the welding process can not use a typical repair tool to complete, and once the inspection is very difficult. If the estimates of the expected amount of these components are correct, then the repair of the area arrangement package must become a viable, user-friendly and cost-effective option for millions of repair operators around the world.
There are several key considerations in the reflow process. On the entire surface of the package and the entire surface of the PCB, the uniform heat distribution and heat transfer are critical. The heating process and the temperature setting must be such that the package reaches the reflux and then melts itself along with the solder balls and lands itself onto the pads, forming intermetallic compounds with the pads.
Note how the components fall, parallel to the PCB, and how all the solder balls are uniform in shape, and are completely "wet" or welded to the pads.
On the contrary, uneven heating will cause the package to fall or tilt unevenly to the side or angle that has already reached the return. If the process is stopped at this time, then the component will not even land itself, will not reach the coplanar, and therefore will be insufficiently welded.
In addition, for a very small, very light CSP / flip chip component, a key consideration is the flow rate in a convection reflow oven. Although the lowest airflow velocity is required to conduct heat to the components and PCBs, the speed must not allow these light elements to be blown or moved in the reflow process. When a very small eutectic ball is in a liquid state, any movement may cause the solder ball to collapse, causing the element to fall entirely on the plate during reflow.